Magma® Design Automation Inc. (Nasdaq: LAVA), a provider of chip design software, today announced that NVIDIA Corporation standardized on Magma’s Talus® IC implementation software for design of 45-nanometer (nm) integrated circuits. NVIDIA selected Talus because it offers advanced capabilities for addressing 45-nm design challenges, supporting leading edge 45-nm routing rule and extraction, low-power design and large, high-utilization macro-rich designs. By leveraging Talus’ advanced, integrated capabilities such as a congestion-aware automated macro placer, rapid timing and DRC closure, and sign-off-correlated post-layout optimization, NVIDIA can achieve better time to market and higher productivity.
“NVIDIA produces some of the world’s largest designs at advanced process nodes, and the success of these designs is dependent on meeting very tight time-to-market demands,” said David Dumoulin, director of Engineering at NVIDIA. “Because of this, improving our overall design quality is important. The Talus platform, which provides unique integrated features that directly address our 45-nm design challenges, allows us to significantly accelerate design optimization to achieve better quality of results.”
“Magma’s Talus IC implementation software provides advanced capabilities, a high degree of automation and a proven predictable flow,” said Kam Kittrell, general manager of Magma’s Design Implementation Business Unit. “NVIDIA’s decision to standardize on Talus for its 45-nm ICs confirms Magma software’s ability to address the design challenges of advanced process nodes.”
Talus: The Platform for 45-nm Design
Magma’s Talus IC implementation software provides advanced capabilities for 45-nm design within an integrated and highly automated RTL-to-GDSII flow. The front-end product allows logic designers to synthesize, visualize, evaluate and improve RTL code quality, design constraints, testability requirements and floorplan. Talus also integrates fast, full-featured, high-capacity predictable synthesis capabilities, full and incremental static timing analysis and power analysis. Magma’s physical design solution includes optimization, place and route, useful skew clock generation, floorplanning and power planning, RC extraction and a single, built-in incremental timing analyzer. Based on Magma's unified data model, this platform accurately predicts final timing prior to detailed placement, eliminates timing closure iterations and enables rapid design closure while taking into account 45-nm effects such as on-chip variation (OCV). Magma supports leading foundries’ 45-nm routing rules and parasitic technology files.
The Magma platform also includes advanced power optimization and management capabilities, and implements multiple power-saving design strategies to achieve maximum power reduction. The Magma system integrates low-power analysis and optimization engines throughout the entire RTL-to-GDSII flow. The system supports advanced techniques such as native multi-Vt, automated multi-voltage designs, adaptive voltage scaling using concurrent multicorner optimization and multi-Vdd, and physical implementation that meets leading foundries’ 45-nm dynamic and leakage power requirements.
About Magma
Magma’s software for designing integrated circuits (ICs) is used to create complex, high-performance chips required in cellular telephones, electronic games, WiFi, MP3 players, DVD/digital video, networking, automotive electronics and other electronic applications. Magma’s EDA software for IC implementation, analysis, physical verification, circuit simulation and characterization is recognized as embodying the best in semiconductor technology, enabling the world's top chip companies to “Design Ahead of the Curve”™ while reducing design time and costs. Magma is headquartered in San Jose, Calif., with offices around the world. Magma's stock trades on Nasdaq under the ticker symbol LAVA. Visit Magma Design Automation on the Web at www.magma-da.com.
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